The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Referring now to FIG. 1, an example multi-channel analog-to-digital converter (ADC) 100 includes a single ADC (e.g., a successive approximation register, or SAR, ADC) 104 to convert an analog input signal 108 to a digital output signal 112. The analog input signal 108 is provided to a plurality of channels 116-1, 116-2, 116-3, . . . , and 116-n, referred to collectively as channels 116. Each of the channels 116 includes a corresponding one of input amplifiers 120-1, 120-2, 120-3 , . . . , and 120-n, referred to collectively as input amplifiers 120, low pass filters (LPFs) 124-1, 124-2, 124-3, . . . , and 124-n, referred to collectively as LPFs 124, and analog track and hold (T/H) circuits 128-1, 128-2, 128-3, . . . , and 128-n, referred to collectively as T/H circuits 128. The T/H circuits 128 allow the analog input signal 108 (as amplified by the input amplifiers 120 and filtered by the LPFs 124) to be sampled simultaneously by the ADC 104 via multiplexer 132. A digital LPF 136 filters an output of the ADC 104 to generate the digital output signal 112.